CERBERO H2020 Project
The Intelligent system DEsign and Application (IDEA) laboratory of the University of Sassari (UNISS), http://idea.uniss.it/, invites applications for a Senior Research Assistant in the areas of embedded system design. We seek outstanding applicants who have demonstrated research expertise in the design of low power hardware. This 1 year position, extendable till the project end (Dec 2019), is going to be founded within the scope of the H2020 project “CERBERO – Cross-layer modEl-based fRamework for multi-oBjective dEsign of Reconfigurable systems in unceRtain hybRid envirOnments”, started in January 2017 (http://www.cerbero-h2020.eu/). It is an international project involving 12 different partners from industry and academy, coming from 7 different countries.
The main goal of the CERBERO project is the development of a design environment for CPS based on two pillars: a cross-layer model based approach to describe, optimize, and analyze the system and all its different views concurrently; an advanced adaptivity support based on a multi-layer autonomous engine. In the context of CERBERO, the IDEA lab is seeking for an experienced researcher willing to work autonomously in such an international project on self-reconfigurable hardware-software platforms. The candidate will be involved in the following activities:
- modelling and implementation of a runtime reconfigurable substrate;
- implementation of self-reconfiguration strategies for FPGA-based domain specific accelerators;
- definition of the programmability support for the envisioned heterogeneous computing blocks;
- integration of all the envisioned components/techniques in the CERBERO design environment.
BASIC QUALIFICATIONS: Ph.D. in electronic engineering, computer engineering, or computer science field; or (equivalently) 3 years of expertise on the topics relevant to the call, with demonstrated record of research activities. Previous team working experiences and expertise in the coordination of small/medium research tasks are mandatory for candidates in the Senior position.
PREFERRED SKILLS: knowledge of digital hardware design and HDL languages (Verilog, VHDL), experience with digital hardware testing and simulation, knowledge of C and Java languages.
POSITION AVAILABLE: You can apply following the indications provided here: https://www.uniss.it/bandi/bando-n-3-assegni-di-ricerca-presso-il-dipartimento-di-chimica-e-farmacia-resp-la-dottssa-francesca-palumbo. Deadlines for application is the 7th of May, evaluation of the CVs and an interview will follow. The contract will start the 15th of May.
INFORMATION: If you are interested in this position and want to have more details about it, please contact Dr. Francesca Palumbo (firstname.lastname@example.org), who is CERBERO scientific coordinator and UNISS responsible for the open position.