ALOHA and FITOPTIVIS
The Intelligent system DEsign and Application (IDEA, http://idea.uniss.it/) laboratory of the University of Sassari (UNISS) invites applications for Research Scholarship or Post-Doc Researcher in the areas of embedded system design. We seek applicants who have interest and expertise in the design of low power hardware design and customization. Positions are going to be founded within the scope of the H2020 project “ALOHA – software framework for runtime-Adaptive and secure deep Learning On Heterogeneous Architectures” and the ECSEL project “FITOPTIVIS – From the cloud to the edge: smart IntegraTion and OPtimisation Technologies for highly efficient Image and VIdeo processing Systems”
The main goal of the ALOHA H2020 project is to facilitate implementation of Deep Learning (DL) algorithms on heterogeneous low-energy computing platforms. ALOHA is meant to foster the pervasive adoption of such algorithms in the embedded domain. While FITOPTIVIS aims at applying key enabling technologies as DL and advanced adaptivity strategies in the context of reconfigurable video processing pipelines.
In this context, the IDEA lab is seeking for researchers willing to work in international projects. Potential candidates will be involved in the following activities:
- Modeling and implementation of application specific hardware accelerators;
- Runtime reconfigurability studies for system adaptivity support and for energy-/power-related optimization;
- Definition of the programmability support and interfaces/adapters for different target architectures;
- Integration of all the envisioned strategies/techniques in the ALOHA and FitOptiVis framework and platforms.
BASIC QUALIFICATIONS: Degree/Ph.D. in electronic engineering, computer engineering, or computer science field. Post-DoC position candidates will be assessed also on their capabilities and previous experience in carry out autonomously research tasks. If you do not hold a PhD, but you can demonstrate 3 years of research experience, you can still apply for a Post-DoC level position.
PREFERRED SKILLS: Knowledge of digital hardware design and HDL languages (Verilog, VHDL), experience with digital hardware testing and simulation, programming languages knowledge (C, C++, and Java).
POSITION AVAILABLE: Selection procedures will open in January/February 2020. Position starts in March/April 2020.
INFORMATION: If you are interested in these positions and want to have more details, please contact Dr. Francesca Palumbo (firstname.lastname@example.org), IDEA lab co-director. Please note that the selection processes on the different positions are not open yet. Expression of interests will be collected by mid December 2019.