H2020 project CERBERO
The Intelligent system DEsign and Application (IDEA) laboratory of the University of Sassari (UNISS), http://idea.uniss.it/, invites applications for a post-doc position as Research Assistant in the areas of embedded system design. We seek outstanding applicants who have demonstrated research expertise in the design of low power hardware. The position is founded within the scope of the H2020 project “CERBERO – Cross-layer modEl-based fRamework for multi-oBjective dEsign of Reconfigurable systems in unceRtain hybRid envirOnments”, started in January 2017 (http://www.cerbero-h2020.eu/), which goal is the development of a design environment for CPS.
In the context of CERBERO, the IDEA lab is seeking for an experienced researcher willing to work autonomously in such an international project on self-reconfigurable hardware-software platforms. The candidate will be involved in the following activities:
- research on self-reconfiguration strategies for FPGA-based domain specific accelerators;
- research on approximate computing techniques for FPGA-based domain specific accelerators;
- definition of automated strategies for accelerators implementation and programmability support;
- integration of all the envisioned components/techniques in the CERBERO design environment.
BASIC QUALIFICATIONS: Ph.D. in electronic engineering, computer engineering, or computer science field; or (equivalently) 3 years of expertise on the topics relevant to the call, with demonstrated record of research activities (including research contracts or research fellowships, and appropriate scientific production). Previous team working experiences and expertise in the coordination of small/medium research tasks are highly appreciated.
PREFERRED SKILLS: Applicants should have previous experience in international research contexts and should be capable to autonomously work on advanced research tasks. Applicants need to have a strong background in high performance digital systems design, reconfigurable systems architectures and FPGA prototyping. Preferred skills: Knowledge of digital hardware design and HDL languages (Verilog, VHDL), experience with digital hardware testing and simulation, knowledge of C and Java languages.
POSITION AVAILABLE: You can apply (separately for each of them) following the indications provided here: https://www.uniss.it/bandi/bando-n-1-assegno-di-ricerca-presso-il-dipartimento-di-chimica-e-farmacia-resp-la-dottssa-francesca-palumbo. Deadlines for application is the 4th of February, evaluation of the CVs and an interview will follow.
INFORMATION: If you are interested in this position and want to have more details about it, please contact Dr. Francesca Palumbo (email@example.com), who is UNISS responsible for CERBERO.