Claudio Rubattu

Claudio Rubattu
Research Assistant
crubattu@uniss.it
About Me

He is a research collaborator at the University of Sassari. He received his degree in Electronic Engineering in 2015 at the University of Cagliari. In May 2015 he started a 1 year and 6 months research grant related to embedded system design in bio-medical applications. His main research focus is related to reconfigurable systems design and development of code generation tools for low power reconfigurable hardware architectures.

Research Interests

Dataflow, Reconfigurable Systems, Low-power, Network on chip, VLSI

Publications

2019

Fanni, L; Suriano, L; Rubattu, C; de Rojas, P S; de la Torre, E; Palumbo, F

A dataflow implementation of inverse kinematics on reconfigurable heterogeneous MPSoC Conference

2457 , CEUR-WS, 2019.

Links | BibTeX

Palumbo, F; Fanni, T; Sau, C; Rodríguez, A; Madroñal, D; Desnos, K; Morvan, A; Pelcat, M; Rubattu, C; Lazcano, R; Raffo, L; de la Torre, E; Juárez, E; Sanz, C; de Rojas, Sánchez P

Hardware/Software self-adaptation in CPS: The CERBERO project approach Journal Article

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), 11733 LNCS , pp. 416-428, 2019.

Links | BibTeX

Payvar, S; Boutellier, J; Rubattu, C; Pelcat, M; Morvan, A

Extending architecture modeling for signal processing towards GPUs Conference

2019-September , European Signal Processing Conference, EUSIPCO, 2019.

Links | BibTeX

2018

Rubattu, C; Palumbo, F; Pelcat, M

Adaptive software-augmented hardware reconfiguration with dataflow design automation Conference

2018-January , Institute of Electrical and Electronics Engineers Inc., 2018.

Links | BibTeX

Rubattu, C; Palumbo, F; Sau, C; Salvador, R; Serot, J; Desnos, K; Raffo, L; Pelcat, M

Dataflow-Functional High-Level Synthesis for Coarse-Grained Reconfigurable Accelerators Journal Article

IEEE Embedded Systems Letters, 2018.

Links | BibTeX

Rubattu, C

Dataflow-based adaptation framework with coarse-grained reconfigurable accelerators Conference

2208 , CEUR-WS, 2018.

Links | BibTeX

2017

Meloni, P; Rubattu, C; Tuveri, G; Pani, D; Raffo, L; Palumbo, F

Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs Journal Article

Journal of Systems Architecture, 76 , pp. 89-101, 2017.

Links | BibTeX

2016

Meloni, P; Palumbo, F; Rubattu, C; Tuveri, G; Pani, D; Raffo, L

MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation Journal Article

Microprocessors and Microsystems, 43 , pp. 67-80, 2016.

Links | BibTeX

Meloni, P; Rubattu, C; Tuveri, G; Raffo, L

A Custom dual-processor System for Real-time Neural Signal Processing Journal Article

IFAC-PapersOnLine, 49 (25), pp. 61-67, 2016.

Links | BibTeX